От: SoC-NewsAlert@design-reuse.com
Отправлено: 8 июня 2004 г. 11:01
Кому: Michael Dolinsky
Тема: D&R SoC News Alert - June 8, 2004
DR SoC News Alert
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June 8, 2004    


Welcome to issue of June 8, 2004 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

NEW ON D&R WEB SITE !!!!

D&R FOUNDRY CORNER : All the information you need about silicon proven virtual components and foundry opportunities
Go to: http://www.us.design-reuse.com/foundry

RapidIO Product Line from Jennic Ltd
Serial SCSI (SAS) System Verification IP from Expert I/O
Low Power 4 wire Serial GMII Interface IP from Ceva, Inc.
Wanted IPs :
  • VNC coder
    • ESL-based flow eases complex SoC design
    System-Level Design Tackles Tough Soft Radio Framework Challenges
    Flexibility key to profitability (by Carl Schlachte, CEO, ARC International)
    IP/SOC PRODUCTS
    TriCN Introduces Breakthrough PCI-Express PHY Products
    TriCN's PCI Express PHY Verified Using Denali PureSpec Verification IP
    Synopsys Reduces AMBA Bus-Based SoC Design Time with DesignWare Library
    CAST and Innovative Semiconductors Combine IP for Integrated USB-OTG Solution
    ARM Announces AXI System Components For High-Performance System-On-Chip Designs
    Synopsys And ARM Collaborate To Accelerate AMBA AXI Adoption With Designware Verification IP
    Aplus Flash Technology announces availability of 0.35um embedded OTP EPROM IP with maximum performance: aplus' 0.35um embedded OTP IP offers high-performance , low-voltage operation on SMIC's 0.35um 2P3M OTP EPROM process
    Toshiba to promote MeP core with tool vendors, design houses
    Verisity to Showcase its PCI Express Verification IP at PCI-SIG Developers Conference 2004
    Pixelworks rolls line of video decoder SoCs
    Intel targets three processors for embedded market
    Prosilog demonstrates the integration of the TC4SOC Platform for STMicroelectronics with Magillem as per SPIRIT guidelines
    Xilinx And Amirix Announce MultiBERT Reference Design For Serial Backplane Validation
    STRUCTURED ASIC
    LSI Logic Uses Innovative Landing Zone Approach to Broaden Processor Offering for RapidChip(TM) Platform ASIC
    eASIC and Golden Gate Technology Announce the Adoption of Critical EDA Software to Support Structured ASIC Design
    FOUNDRIES
    SMIC receives 300-mm wafer equipment for Fab 4
    BUSINESS
    Zoran Corporation Agrees To Acquire Emblaze Semiconductor And Enters The Multimedia Mobile Phone Market
    Mentor Graphics Enters Into Agreement to Acquire 0-In Design Automation
    MatrixOne to Acquire Synchronicity
    TransDimension joins WiMedia Alliance and extends its peripheral connectivity strategy into Wireless connectivity
    Sarnoff Chooses The LogicWorks To Market Silicon IP Products In Northeast
    iaSolution And ARM Announce Collaboration For Deployment Of Swerve Client 3D Technology
    VSI Alliance Realigns to Address Full Spectrum of SoC/IP Technical and Commercial Issues
    DEALS
    Denali's PureSpec Used by Agere for PCI Express Interface Verification
    Elpida and Rambus Modify and Extend SDRAM and DDR Patent Licensing Agreement; New agreement includes DDR2 and FB-DIMM innovations
    Fulcrum Microsystems Taps Artisan Analog/Mixed-Signal IP for High-Speed PivotPoint Switch Chips
    Broadcom licenses QSound audio technology for baseband processors
    Renesas Technology licenses Ceva Xpert-Blue IP and achieves Bluetooth 1.2 certification
    PEOPLE
    Verisity Names New Members to Its Board of Directors
    DESIGN SERVICES
    Silicon & Software Systems Ltd. (S3) selected as preferred supplier to Philips' semiconductor division
    Silicon & Software Systems (S3) designs right-first-time in 90nm technology
    EMBEDDED SYSTEMS
    NEC Electronics America Announces EEMBC Benchmark Scores for 50-MHz, 32-Bit V850E Microcontroller and 266-MHz VR4133 MIPS-Based Microprocessor
    STMicroelectronics Adds 'Build' and 'Program' Capability to STVD7 Microcontroller Development Software
    FPGA/CPLD
    Xilinx Unveils Virtex-4 Family - Industry's First Multi-Platform FPGA
    Powered By Altera Cyclone FPGAs and Nios Processor, KoolSpan Delivers Wi-Fi Network Security
    Actel ProASICPLUS FPGAs Selected By Hamilton Sundstrand for Joint Strike Fighter Project
    Xilinx Ships New Release Of System Generator For DSP Development Tool With Full Support For Latest MatLab & Simulink Software
    Altera Receives Stratix II Wafers Ahead of Schedule
    EDA
    Synopsys' coreAssembler Tool Decreases Design Time for Leading Semiconductor Companies by up to 67 Percent and Significantly Reduces SoC Cost
    Barcelona Opens Synthesis Tools to Customers
    The Open SystemC Initiative and the Open Core Protocol International Partnership Join Forces to Target TLM Layer Standardization
    OTHER
    Denali Joins Synopsys SystemVerilog Catalyst Program
    Synopsys Demonstrates Low Power, IP, Performance and Yield Innovations at 41st DAC
    Artisan Showcases Comprehensive Analog and Digital IP Solutions for Nanometer Design at 2004 Design Automation Conference
    MIPS Technologies Executive to Address "Battle for the Digital Living Room"

    NEW ON D&R WEB SITE

    View webcasts from the 2003 IP/SoC Forum:
    - Keynote talk from Dr. Raul Camposano Senior VP, CTO - Synopsys
    - Panel on ASIC Platform (brought to you by LSI Logic)
    - Panel on IP Quality & Verification (brought to you by Verisity)
    - Panel on SystemC (brought to you by CoWare)
    Go to: http://www.us.design-reuse.com/exclusive


    DAC 2004
    San Diego, CA
    June 7-11, 2004
    Booth 1420
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